Intel announces Tiger Lake processors at CES 2020
Intel's Tiger Lake processors and Xe architecture bring a giant power boost to thin and light laptops.
What you need to know
- Intel announced the Tiger Lake line of processors at CES 2020.
- The processors double graphic performance over previous generations.
- They will be available to manufacturers this summer.
Intel unveils its new line of Tiger Lake processors at CES 2020. The processors double the graphics performance when compared to the previous generation. As a result, thin and light laptops gain access to high definition gaming and significantly improved processing power.
On stage at CES 2020, Intel showed a new Tiger Lake processor running a processing-heavy game on a thin and light laptop. Intel emphasized several times how the Tiger Lake processors bring increased processing power to thinner devices that use Intel integrated graphics.
Tiger Lake-powered devices are built on Intel's Xe architecture. As pointed out by Anandtech, this architecture targets sub-25W power on the GPU, which lines up well with Intel's clear emphasis on bringing powerful processing to thinner and lighter devices.
In addition to the Tiger Lake processor line, Intel gave a quick tease of its first discrete processor, the DG1. Intel ended its time on stage with a brief demonstration of the processor.
Intel matched some of what we expected and speculated earlier but also added some specific numbers. The most noteworthy being that Intel promises a doubling of processing power over previous generations of processors with Tiger Lake.
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Sean Endicott is a tech journalist at Windows Central, specializing in Windows, Microsoft software, AI, and PCs. He's covered major launches, from Windows 10 and 11 to the rise of AI tools like ChatGPT. Sean's journey began with the Lumia 740, leading to strong ties with app developers. Outside writing, he coaches American football, utilizing Microsoft services to manage his team. He studied broadcast journalism at Nottingham Trent University and is active on X @SeanEndicott_ and Threads @sean_endicott_.